DSP230

• AXIS MultiComputer System Blade
• Quad PowerPC 8641 or 8641D
• Freescale 8640/8640D ready
• Eight banks DDR2 SDRAM
• Rugged 6U VITA 46.3 form factor for air,spray and conduction cooled systems
• Serial RapidIO switch to all nodes and P1
• Gen-2 PCIe switch to all nodes, XMC site, PCI-X PMC & optional P2 connector
• One PMC (PCI-X)/XMC (VITA 42.3) site
• Gigabit Ethernet switch to all nodes, backplane and front panel (air-cooled only)
• Node management controller
• Eight serial ports with four COM ports to the front panel (air-cooled only)
• 0.8 inch or 1 inch pitch with optional two level maintenance covers
• AXISFlow Inter processor communication
• AXISLib optimized AltiVec libraries
• AXISView system analysis and debug
• GE Fanuc Built-In-Test (BIT) for PowerPC
• BSPs for LynxOS 5.0 & VxWorks 6.6
• Enhanced BSP with full featured Serial RapidIO driver support
• For Ruggedization Levels, please see the configuration guide under the downloads tab

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	Type	Title
	Data Sheet	DSP230 Quad Freescale MPC8641D Dual Fabric VPX Multiprocessor DSP230 Product Data Sheet
	Brochures	AXIS Advanced Integrated Multiprocessor Software AXIS Software Overview
	Brochures	Sonar Solutions Brochure 8-page Sonar Solutions Brochure
	White Papers	Advances in Radar Processing Advances in Radar Processing white paper addresses multi-functional radar systems and how they need to perform much more sophisticated, computationally intensive algorithms - and to do so within limited space & constraints on power & heat dissipation.
	White Papers	AXIS - Taking the Sting out of Multiprocessor DSP Application Development This white paper will show how a modern tool-chain might address different issues when configuring and programming a complex, heterogeneous multiprocessor system for a Mil & Aero application and result in a much reduced time to solution.
	White Papers	VPX: VME For the 21st Century This paper looks at VPX for rugged environments and embedded military applications.
	Application Notes	Flash Programming on the DSP220/DSP230 Application Note
	BIT Guide	BIT on DSP220/DSP230 Software Reference Manual
	Configuration Guide	RUGGEDIZATION LEVELS
	Hardware Manual	DSP230 Hardware Reference Manual
	Hardware Manual	DSP230RTM Product Manual
	Hardware Manual	VPX I/O Modules Hardware Reference Manual

Customer support contact info for this product is listed below by global region. All related documentation and software for this product are listed under the "Downloads" tab of this product page.

Primary Support

Towcester, UK
Tove Valley Business Park
Towcester, Northamptonshire, -- NN12 6PF

Support Phone: +44 (0) 1327 322760
Support E-mail: support.towcester@gefanuc.com

Contact Repair Service: repairs.towcester@gefanuc.com
RMA: aug-support@gefanuc.com

Asia Pacific, Oceana Support

Tokyo, Japan
Akasaka Park Building, 5-2-20
Akasaka, Minato-ku, Tokyo, 107-6112

Support Phone:
Support E-mail: support-apo.gefes@ge.com

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• DSP220 - The DSP220 is a 6U VXS (VITA 41.2) quad 8641/8641D multiprocessor. Featuring four single- or dual core Freescale™ PowerPC® 8641 system-on-chip nodes and a VITA 42.2-compliant XMC slot, the DSP220 is available in six build levels.
• AXISView - A suite of integrated graphical tools designed for multiprocessor systems. It provides system visualization with the ability to configure, download, run, debug and monitor a multiprocessor application from an integrated, intuitive GUI environment.
• AXISLib-VSIPL - Performance optimized vector signal image processing library compliant with VSIPL Core 1.0 profile, & implementing over 512 vector, signal and image processing functions. Operates in a standalone mode or as an integral software module within AXIS.
• AXISLib-RSPL - AXISLib-RSPL - Performance optimized signal processing. The Signal & Vector Processing Library is a high performance AXIS software module with over 400 DSP & mathematical functions created to help developers maximize system and application performance.
• AXISFlow - AXISFlow is a high performance inter-processor communication software providing high throughput, low latency, reconfigurable interconnects that facilitate data transport between tasks, processors, boards and systems.
• AXISLib-CL - AXISLib-CL Signal and Vector Processing Library providing digital signal processing & mathematical functions. Provides a C implementation of the AXISLib products to allow algorithm development and modelling without the need for embedded hardware.